FPGA Research

Field Programmable Gate Arrays (FPGAs) are complex logic devices which can be configured from a desktop personal computer. A state-of-the-art FPGA contains thousands of configurable logic blocks (CLBs). Each CLB will have several basic logic elements consisting of a look-up table (LUT) for implementing combinational logic and a memory element known as a flip-flop (FF). The wires connecting the various CLBs can be programmed as well through a series of switching boxes in the routing channels. A high-level descriptor language such as VHDL or Verilog is used to describe how an FPGA is to be configured.

FPGA diagram
The Floorplan of a Typical FPGA

The development costs of FPGAs are significantly lower than full custom integrated circuit designs. In addition, an FPGA design will often be more efficient in terms of power and speed than a microprocessor-based solution because an FPGA can be configured exactly to perform a desired function. A state-of-the-art FPGA is capable of implementing a sophisticated embedded processor, such as a 32-bit RISC design, on its reconfigurable fabric. Hence, the combination of low costs, superior performance, and logic flexibility make FPGAs the preferred design option for many modern applications.

Pong game
A Xilinx Spartan 3 FPGA configured to play the video game PONG

The Electrical Engineering Research Laboratory has several state-of-the-art FPGAs from Xilinx including four Zynq 7000 Zedboards which integrate a dual core ARM processor with reconfigurable logic. Some recent and ongoing research projects involving FPGAs include:

Compressive Sensing Hardware
Compressive sensing allows signals with sparse representations to be captured at significantly lower sampling rates than normal. The tradeoff is the increased digital processing required to reconstruct the signal. This research is currently investigating the development of dedicated hardware on FPGAs that can be used to accelerate these computations with application in processing radar signals.
Fault Tolerant Designs
A fault tolerant circuit is capable of detecting an error and then correcting it. This has important applications in mission critical designs such as in avionics and medical electronic devices and for systems operating in remote and harsh environments such as outer space. Our recent work has demonstrated the feasibility of implementing fault tolerant arithmetic logic on FPGAs.
Stochastic Computation for Bayesian Inference
Bayesian inference is useful for making decisions based upon prior knowledge when there is uncertainty in the data. Stochastic compututation performs computations based upon probabilities encoded in the bitstreams. Our research is aimed at devloping Bayesian inference machines that can be efficiently implemented on FPGAs for computer vision and object tracking.

Representative publications

  1. D. H. K. Hoe, “Bayesian Inference using Spintronic Technology: A Proposal for an MRAM-based Stochastic Logic Gate,” Proc. IEEE 60th International Midwest Symposium on Circuits and Systems, pp. 1521-1524, Aug. 2017.
  2. H. A. Ochoa, D. H. Hoe, and Dinesh Veeramachaneni, “The implementation of compressive sensing on an FPGA for chaotic radars,” SPIE DSS Conference, Baltimore, MD, April 2015.
  3. D. H. K. Hoe, L. P. D. Bollepalli, and C. D. Martinez, “FPGA Fault Tolerant Arithmetic Logic: A Case Study Using Parallel-Prefix Adders,” VLSI Design, Special Issue: FPGA-Based Architectures for High Performance Computing, Nov. 2013.